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<div class="header">
  <div class="summary">
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">DAC functions<div class="ingroups"><a class="el" href="group__group__hppass.html">HPPASS       (High Performance Programmable Analog Sub-System)</a> &raquo; <a class="el" href="group__group__hppass__csg.html">CSG (Comparator Slope Generator)</a> &raquo; <a class="el" href="group__group__hppass__csg__functions.html">Functions</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga9fde1946f1bf2f2241e518bdf31d1a38"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#ga9fde1946f1bf2f2241e518bdf31d1a38">Cy_HPPASS_DAC_SetPeriod</a> (uint8_t sliceIdx, <a class="el" href="structcy__stc__hppass__dac__period__t.html">cy_stc_hppass_dac_period_t</a> period)</td></tr>
<tr class="memdesc:ga9fde1946f1bf2f2241e518bdf31d1a38"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets DAC period buffer for the specified CSG slice.  <a href="#ga9fde1946f1bf2f2241e518bdf31d1a38">More...</a><br /></td></tr>
<tr class="separator:ga9fde1946f1bf2f2241e518bdf31d1a38"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1592d290c2a7c2c30cddaed478555944"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#ga1592d290c2a7c2c30cddaed478555944">Cy_HPPASS_DAC_SetParamSyncReady</a> (uint8_t sliceIdx)</td></tr>
<tr class="memdesc:ga1592d290c2a7c2c30cddaed478555944"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the ready status of DAC parameter synchronized update for the specified CSG slice.  <a href="#ga1592d290c2a7c2c30cddaed478555944">More...</a><br /></td></tr>
<tr class="separator:ga1592d290c2a7c2c30cddaed478555944"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga743f2b26b4eb1ffec1ede87cdb05182f"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#ga743f2b26b4eb1ffec1ede87cdb05182f">Cy_HPPASS_DAC_IsBusy</a> (uint8_t sliceIdx)</td></tr>
<tr class="memdesc:ga743f2b26b4eb1ffec1ede87cdb05182f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the DAC busy status of the specified CSG slice.  <a href="#ga743f2b26b4eb1ffec1ede87cdb05182f">More...</a><br /></td></tr>
<tr class="separator:ga743f2b26b4eb1ffec1ede87cdb05182f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a9651861836816602274a0871552e6b"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#ga2a9651861836816602274a0871552e6b">Cy_HPPASS_DAC_Start</a> (uint8_t sliceIdx, <a class="el" href="group__group__hppass__csg__enums.html#ga7315070c4636299c1a120a8a73a30c71">cy_en_hppass_dac_cmd_t</a> command)</td></tr>
<tr class="memdesc:ga2a9651861836816602274a0871552e6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set hardware start or FW start the DAC selected mode for the specified CSG slice.  <a href="#ga2a9651861836816602274a0871552e6b">More...</a><br /></td></tr>
<tr class="separator:ga2a9651861836816602274a0871552e6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfd1b706d079debb4f61b99f9c43d7e9"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#gabfd1b706d079debb4f61b99f9c43d7e9">Cy_HPPASS_DAC_Stop</a> (uint8_t sliceIdx)</td></tr>
<tr class="memdesc:gabfd1b706d079debb4f61b99f9c43d7e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop the DAC selected mode for the specified CSG slice.  <a href="#gabfd1b706d079debb4f61b99f9c43d7e9">More...</a><br /></td></tr>
<tr class="separator:gabfd1b706d079debb4f61b99f9c43d7e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fe48e5fbc0c067192dee1ed251546d6"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#ga7fe48e5fbc0c067192dee1ed251546d6">Cy_HPPASS_DAC_SetValue</a> (uint8_t sliceIdx, uint16_t value)</td></tr>
<tr class="memdesc:ga7fe48e5fbc0c067192dee1ed251546d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets value for DAC buffered mode for the specified CSG slice.  <a href="#ga7fe48e5fbc0c067192dee1ed251546d6">More...</a><br /></td></tr>
<tr class="separator:ga7fe48e5fbc0c067192dee1ed251546d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa47beb6aa24ec022a08cada6ef1845d"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#gaaa47beb6aa24ec022a08cada6ef1845d">Cy_HPPASS_DAC_SetHystereticValues</a> (uint8_t sliceIdx, uint16_t high, uint16_t low)</td></tr>
<tr class="memdesc:gaaa47beb6aa24ec022a08cada6ef1845d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set high and low values for DAC hysteretic mode for the specified CSG slice.  <a href="#gaaa47beb6aa24ec022a08cada6ef1845d">More...</a><br /></td></tr>
<tr class="separator:gaaa47beb6aa24ec022a08cada6ef1845d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga291a4f3ff177c40ea34c06185ef11002"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#ga291a4f3ff177c40ea34c06185ef11002">Cy_HPPASS_DAC_SetSlopeValues</a> (uint8_t sliceIdx, uint16_t start, uint16_t stop, uint8_t step)</td></tr>
<tr class="memdesc:ga291a4f3ff177c40ea34c06185ef11002"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the start, stop, and step values for DAC slope mode for the specified CSG slice.  <a href="#ga291a4f3ff177c40ea34c06185ef11002">More...</a><br /></td></tr>
<tr class="separator:ga291a4f3ff177c40ea34c06185ef11002"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab253aad0545d3ee28a4554f9ec483aa3"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hppass__csg__dac.html#gab253aad0545d3ee28a4554f9ec483aa3">Cy_HPPASS_DAC_SetLutAddress</a> (uint8_t sliceIdx, uint8_t start, uint8_t stop, uint8_t step)</td></tr>
<tr class="memdesc:gab253aad0545d3ee28a4554f9ec483aa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the start and stop addresses, and step value for DAC LUT mode for the specified CSG slice.  <a href="#gab253aad0545d3ee28a4554f9ec483aa3">More...</a><br /></td></tr>
<tr class="separator:gab253aad0545d3ee28a4554f9ec483aa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga9fde1946f1bf2f2241e518bdf31d1a38"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9fde1946f1bf2f2241e518bdf31d1a38">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_SetPeriod()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_SetPeriod </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="structcy__stc__hppass__dac__period__t.html">cy_stc_hppass_dac_period_t</a>&#160;</td>
          <td class="paramname"><em>period</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets DAC period buffer for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
    <tr><td class="paramname">period</td><td>The DAC period. See <a class="el" href="structcy__stc__hppass__dac__period__t.html">cy_stc_hppass_dac_period_t</a>. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga1592d290c2a7c2c30cddaed478555944"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1592d290c2a7c2c30cddaed478555944">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_SetParamSyncReady()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_SetParamSyncReady </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets the ready status of DAC parameter synchronized update for the specified CSG slice. </p>
<p>Registers DAC_VAL_A, DAC_VAL_B, DAC_PERIOD and DAC_CFG.DAC_STEP will be updated simultaneously on a subsequent DAC trigger.</p>
<dl class="section note"><dt>Note</dt><dd>This function requires the <a class="el" href="structcy__stc__hppass__dac__t.html#afbdc417fcb0b88013e0a5177f003f1f8">cy_stc_hppass_dac_t::paramSync</a> setting to be enabled.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga743f2b26b4eb1ffec1ede87cdb05182f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga743f2b26b4eb1ffec1ede87cdb05182f">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_IsBusy()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE bool Cy_HPPASS_DAC_IsBusy </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Gets the DAC busy status of the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The DAC busy status. </dd></dl>

</div>
</div>
<a id="ga2a9651861836816602274a0871552e6b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2a9651861836816602274a0871552e6b">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_Start()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_Start </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__group__hppass__csg__enums.html#ga7315070c4636299c1a120a8a73a30c71">cy_en_hppass_dac_cmd_t</a>&#160;</td>
          <td class="paramname"><em>command</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set hardware start or FW start the DAC selected mode for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
    <tr><td class="paramname">command</td><td>DAC start command mode. See <a class="el" href="group__group__hppass__csg__enums.html#ga7315070c4636299c1a120a8a73a30c71">cy_en_hppass_dac_cmd_t</a>. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gabfd1b706d079debb4f61b99f9c43d7e9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabfd1b706d079debb4f61b99f9c43d7e9">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_Stop()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_Stop </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stop the DAC selected mode for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga7fe48e5fbc0c067192dee1ed251546d6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7fe48e5fbc0c067192dee1ed251546d6">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_SetValue()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_SetValue </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>value</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets value for DAC buffered mode for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
    <tr><td class="paramname">value</td><td>DAC value. Valid range: 0..1023.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>It could be used to update the only VAL_A register value in other DAC modes. </dd></dl>

</div>
</div>
<a id="gaaa47beb6aa24ec022a08cada6ef1845d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaa47beb6aa24ec022a08cada6ef1845d">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_SetHystereticValues()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_SetHystereticValues </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>high</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>low</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set high and low values for DAC hysteretic mode for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
    <tr><td class="paramname">high</td><td>High value. Valid range: 0..1023.</td></tr>
    <tr><td class="paramname">low</td><td>Low value. Valid range: 0..1023.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>This function is only for the DAC Hysteretic mode </dd></dl>

</div>
</div>
<a id="ga291a4f3ff177c40ea34c06185ef11002"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga291a4f3ff177c40ea34c06185ef11002">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_SetSlopeValues()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_SetSlopeValues </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>start</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>stop</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>step</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set the start, stop, and step values for DAC slope mode for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
    <tr><td class="paramname">start</td><td>Start value. Valid range: 0..1023.</td></tr>
    <tr><td class="paramname">stop</td><td>Stop value. Valid range: 0..1023.</td></tr>
    <tr><td class="paramname">step</td><td>Step value. Valid range: 1..64.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>This function is only for the DAC Slope mode </dd></dl>

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<a id="gab253aad0545d3ee28a4554f9ec483aa3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab253aad0545d3ee28a4554f9ec483aa3">&#9670;&nbsp;</a></span>Cy_HPPASS_DAC_SetLutAddress()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">__STATIC_INLINE void Cy_HPPASS_DAC_SetLutAddress </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>sliceIdx</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>start</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>stop</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>step</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets the start and stop addresses, and step value for DAC LUT mode for the specified CSG slice. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">sliceIdx</td><td>The CSG slice. Valid range: 0..4.</td></tr>
    <tr><td class="paramname">start</td><td>The start address (in LUT data words). Valid range: 0..127.</td></tr>
    <tr><td class="paramname">stop</td><td>The stop address (in LUT data words). Valid range: 0..127.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>start and stop parameter values are internally converted into the LUT physical register address values.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">step</td><td>Step value (in LUT data words). Valid range: 1..64.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>This function is only for the DAC LUT mode </dd></dl>

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